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IS63LV1024
128K x 8 HIGH-SPEED CMOS STATIC RAM 3.3V REVOLUTIONARY PINOUT
FEATURES
* High-speed access times: 8, 10, 12 and 15 ns * High-performance, low-power CMOS process * Multiple center power and ground pins for greater noise immunity * Easy memory expansion with CE and OE options * CE power-down * Fully static operation: no clock or refresh required * TTL compatible inputs and outputs * Single 3.3V power supply * Packages available: - 32-pin 300-mil SOJ - 32-pin 400-mil SOJ - 32-pin TSOP (Type II)
ISSI
DESCRIPTION
(R)
SEPTEMBER 2000
The ISSI IS63LV1024 is a very high-speed, low power, 131,072-word by 8-bit CMOS static RAM in revolutionary pinout. The IS63LV1024 is fabricated using ISSI's high-performance CMOS technology. This highly reliable process coupled with innovative circuit design techniques, yields higher performance and low power consumption devices. When CE is HIGH (deselected), the device assumes a standby mode at which the power dissipation can be reduced down to 250 W (typical) with CMOS input levels. The IS63LV1024 operates from a single 3.3V power supply and all inputs are TTL-compatible.
FUNCTIONAL BLOCK DIAGRAM
A0-A16
DECODER
128K X 8 MEMORY ARRAY
VCC GND I/O DATA CIRCUIT
I/O0-I/O7
COLUMN I/O
CE OE WE CONTROL CIRCUIT
ISSI reserves the right to make changes to its products at any time without notice in order to improve design and supply the best possible product. We assume no responsibility for any errors which may appear in this publication. (c) Copyright 2000, Integrated Silicon Solution, Inc.
Integrated Silicon Solution, Inc. -- 1-800-379-4774
Rev. H 10/02/00
1
IS63LV1024
PIN CONFIGURATION
32-Pin SOJ
ISSI
PIN CONFIGURATION
32-Pin TSOP (Type II) (T)
32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 A16 A15 A14 A13 OE I/O7 I/O6 GND Vcc I/O5 I/O4 A12 A11 A10 A9 A8
A0 A1 A2 A3 CE I/O0 I/O1 Vcc GND I/O2 I/O3 WE A4 A5 A6 A7 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17
(R)
A0 A1 A2 A3 CE I/O0 I/O1 Vcc GND I/O2 I/O3 WE A4 A5 A6 A7
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
A16 A15 A14 A13 OE I/o7 I/O6 GND Vcc I/O5 I/O4 A12 A11 A10 A9 A8
PIN DESCRIPTIONS
A0-A16 CE OE WE I/O0-I/O7 Vcc GND Address Inputs Chip Enable Input Output Enable Input Write Enable Input Bidirectional Ports Power Ground
TRUTH TABLE
Mode WE CE H L L L OE X H L X I/O Operation Vcc Current High-Z High-Z DOUT DIN ISB1, ISB2 ICC1, ICC2 ICC1, ICC2 ICC1, ICC2 Not Selected X (Power-down) Output Disabled H Read H Write L
ABSOLUTE MAXIMUM RATINGS(1)
Symbol VTERM TBIAS TSTG PT Parameter Terminal Voltage with Respect to GND Temperature Under Bias Storage Temperature Power Dissipation Value -0.5 to Vcc + 0.5 -55 to +125 -65 to +150 1.0 Unit V C C W
Notes: 1. Stress greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.
2
Integrated Silicon Solution, Inc. -- 1-800-379-4774
Rev. H 10/02/00
IS63LV1024
OPERATING RANGE
Range Commercial Industrial Ambient Temperature 0C to +70C -40C to +85C VCC 3.3V 0.3V 3.3V 0.15V
ISSI
(R)
DC ELECTRICAL CHARACTERISTICS (Over Operating Range)
Symbol Parameter VOH VOL VIH VIL ILI ILO Output HIGH Voltage Output LOW Voltage Input HIGH Voltage Input LOW Voltage(1) Input Leakage Output Leakage GND VIN VCC GND VOUT VCC, Outputs Disabled Com. Ind. Com. Ind. Test Conditions VCC = Min., IOH = -4.0 mA VCC = Min., IOL = 8.0 mA Min. 2.4 -- 2.2 -0.3 -1 -5 -1 -5 Max. -- 0.4 VCC + 0.3 0.8 1 5 1 5 Unit V V V V A A
Notes: 1. VIL = -3.0V for pulse width less than 10 ns.
POWER SUPPLY CHARACTERISTICS(1) (Over Operating Range)
Symbol Parameter ICC1 ISB Vcc Operating Supply Current TTL Standby Current (TTL Inputs) TTL Standby Current (TTL Inputs) CMOS Standby Current (CMOS Inputs) Test Conditions VCC = Max., CE = VIL IOUT = 0 mA, f = Max. VCC = Max., VIN = VIH or VIL CE VIH, f = Max VCC = Max., VIN = VIH or VIL CE VIH, f = 0 VCC = Max., CE VCC - 0.2V, VIN VCC - 0.2V, or VIN 0.2V, f = 0 Com. Ind. Com. Ind. Com. Ind. Com. Ind. -8 ns Min. Max. -- -- -- -- -- -- -- -- 160 170 55 55 25 30 5 10 -10 ns Min. Max. -- -- -- -- -- -- -- -- 150 160 45 45 25 30 5 10 -12 ns Min. Max. -- -- -- -- -- -- -- -- 130 140 40 40 25 30 5 10 -15 ns Min. Max. -- -- -- -- -- -- -- -- 120 130 35 35 25 30 5 10 Unit mA mA
ISB1
mA
ISB2
mA
Notes: 1. At f = fMAX, address and data inputs are cycling at the maximum frequency, f = 0 means no input lines change.
CAPACITANCE(1,2)
Symbol CIN CI/O Parameter Input Capacitance Input/Output Capacitance Conditions VIN = 0V VOUT = 0V Max. 6 8 Unit pF pF
Notes: 1. Tested initially and after any design or process changes that may affect these parameters. 2. Test conditions: TA = 25C, f = 1 MHz, Vcc = 3.3V.
Integrated Silicon Solution, Inc. -- 1-800-379-4774
Rev. H 10/02/00
3
IS63LV1024
READ CYCLE SWITCHING CHARACTERISTICS(1) (Over Operating Range)
Symbol Parameter Read Cycle Time Address Access Time Output Hold Time CE Access Time OE Access Time OE to Low-Z Output OE to High-Z Output CE to Low-Z Output CE to Power Up Time CE to Power Down Time
(2)
ISSI
-8 ns Min. Max. 8 -- 2 -- -- 0 0 3 0 0 -- -- 8 -- 8 4 -- 4 -- 4 -- 8 -10 ns Min. Max. 10 -- 2 -- -- 0 0 3 0 0 -- -- 10 -- 10 5 -- 5 -- 5 -- 10 -12 ns Min. Max. 12 -- 3 -- -- 0 0 3 0 0 -- -- 12 -- 12 6 -- 6 -- 6 -- 12 -15 ns Min. Max. 15 -- 3 -- -- 0 0 3 0 0 -- -- 15 -- 15 7 -- 7 -- 7 -- 15 Unit ns ns ns ns ns ns ns ns ns ns ns
(R)
tRC tAA tOHA tACE tDOE tLZOE(2) tHZOE tLZCE tPU tPD
(2)
tHZCE(2) CE to High-Z Output
Notes: 1. Test conditions assume signal transition times of 3 ns or less, timing reference levels of 1.5V, input pulse levels of 0 to 3.0V and C1 output loading specified in Figure 1. 2. Tested with the C2 load in Figure 1. Transition is measured 500 mV from steady-state voltage. Not 100% tested.
AC TEST CONDITIONS
Parameter Input Pulse Level Input Rise and Fall Times Input and Output Timing and Reference Levels Output Load Unit 0V to 3.0V 3 ns 1.5V See Figures 1a and 1b
AC TEST LOADS
317 3.3V
ZOUT = 50 OUTPUT 50 VT = 1.5V
OUTPUT 5 pF Including jig and scope 351
Figure 1
Figure 2
4
Integrated Silicon Solution, Inc. -- 1-800-379-4774
Rev. H 10/02/00
IS63LV1024
AC WAVEFORMS READ CYCLE NO. 1(1,2)
t RC
ADDRESS
ISSI
(R)
t AA t OHA
DOUT
PREVIOUS DATA VALID
t OHA
DATA VALID
READ1.eps
READ CYCLE NO. 2(1,3)
t RC
ADDRESS
t AA
OE
t OHA
t DOE
CE
t HZOE
t LZOE t ACE t LZCE t HZCE
DATA VALID
CE_RD2.eps
DOUT
HIGH-Z
Notes: 1. WE is HIGH for a Read Cycle. 2. The device is continuously selected. OE, CE = VIL. 3. Address is valid prior to or coincident with CE LOW transitions.
Integrated Silicon Solution, Inc. -- 1-800-379-4774
Rev. H 10/02/00
5
IS63LV1024
WRITE CYCLE SWITCHING CHARACTERISTICS(1,3) (Over Operating Range)
Symbol Parameter Write Cycle Time CE to Write End Address Setup Time to Write End Address Hold from Write End Address Setup Time
(1) 1 (2) 2
ISSI
-8 ns Min. Max. 8 7 8 0 0 7 8 5 0 -- 3 -- -- -- -- -- -- -- -- -- 4 -- -10 ns Min. Max. 10 7 8 0 0 7 10 5 0 -- 3 -- -- -- -- -- -- -- -- -- 5 -- -12 ns Min. Max. 12 8 8 0 0 8 12 6 0 -- 3 -- -- -- -- -- -- -- -- -- 6 -- -15 ns Min. Max. 15 10 10 0 0 10 15 7 0 -- 3 -- -- -- -- -- -- -- -- -- 7 -- Unit ns ns ns ns ns ns ns ns ns ns ns
(R)
tWC tSCE tAW tHA tSA tPWE tPWE tSD tHD tHZWE tLZWE
(2) (2)
WE Pulse Width (OE High) WE Pulse Width (OE Low) Data Setup to Write End Data Hold from Write End WE LOW to High-Z Output WE HIGH to Low-Z Output
Notes: 1. Test conditions assume signal transition times of 3ns or less, timing reference levels of 1.5V, input pulse levels of 0 to 3.0V and output loading specified in Figure 1a. 2. Tested with the load in Figure 1b. Transition is measured 500 mV from steady-state voltage. Not 100% tested. 3. The internal write time is defined by the overlap of CE LOW and WE LOW. All signals must be in valid states to initiate a Write, but any one can go inactive to terminate the Write. The Data Input Setup and Hold timing are referenced to the rising or falling edge of the signal that terminates the Write.
AC WAVEFORMS WRITE CYCLE NO. 1(1,2 (CE Controlled, OE = HIGH or LOW)
t WC
ADDRESS
VALID ADDRESS
t SA
CE
t SCE
t HA
WE
t AW t PWE1 t PWE2 t HZWE t LZWE
HIGH-Z
DOUT
DATA UNDEFINED
t SD
DIN
t HD
DATAIN VALID
CE_WR1.eps
6
Integrated Silicon Solution, Inc. -- 1-800-379-4774
Rev. H 10/02/00
IS63LV1024
WRITE CYCLE NO. 2(1) (WE Controlled, OE = HIGH during Write Cycle)
t WC
ADDRESS
VALID ADDRESS
ISSI
t HA
(R)
OE
CE
LOW
t AW t PWE1
WE
t SA
DOUT
DATA UNDEFINED
t HZWE
HIGH-Z
t LZWE
t SD
DIN
t HD
DATAIN VALID
CE_WR2.eps
WRITE CYCLE NO. 3 (WE Controlled: OE is LOW During Write Cycle)
t WC
ADDRESS
VALID ADDRESS
OE CE
LOW
t HA
LOW
t AW t PWE2
WE
t SA
DOUT
DATA UNDEFINED
t HZWE
HIGH-Z
t LZWE
t SD
DIN
t HD
DATAIN VALID
CE_WR3.eps
Notes: 1. The internal write time is defined by the overlap of CE LOW and WE LOW. All signals must be in valid states to initiate a Write, but any one can go inactive to terminate the Write. The Data Input Setup and Hold timing are referenced to the rising or falling edge of the signal that terminates the Write. 2. I/O will assume the High-Z state if OE * VIH.
Integrated Silicon Solution, Inc. -- 1-800-379-4774
Rev. H 10/02/00
7
IS63LV1024
ISSI
(R)
ORDERING INFORMATION Commercial Range: 0C to +70C
Speed (ns) 8 Order Part No. IS63LV1024-8T IS63LV1024-8J IS63LV1024-8K IS63LV1024-10T IS63LV1024-10J IS63LV1024-10K IS63LV1024-12T IS63LV1024-12J IS63LV1024-12K IS63LV1024-15T IS63LV1024-15J IS63LV1024-15K Package TSOP (Type II) 300-mil Plastic SOJ 400-mil Plastic SOJ TSOP (Type II) 300-mil Plastic SOJ 400-mil Plastic SOJ TSOP (Type II) 300-mil Plastic SOJ 400-mil Plastic SOJ TSOP (Type II) 300-mil Plastic SOJ 400-mil Plastic SOJ
Industrial Range: -40C to +85C
Speed (ns) 8 Order Part No. IS63LV1024-8TI IS63LV1024-8JI IS63LV1024-8KI IS63LV1024-10TI IS63LV1024-10JI IS63LV1024-10KI IS63LV1024-12TI IS63LV1024-12JI IS63LV1024-12KI IS63LV1024-15TI IS63LV1024-15JI IS63LV1024-15KI Package TSOP (Type II) 300-mil Plastic SOJ 400-mil Plastic SOJ TSOP (Type II) 300-mil Plastic SOJ 400-mil Plastic SOJ TSOP (Type II) 300-mil Plastic SOJ 400-mil Plastic SOJ TSOP (Type II) 300-mil Plastic SOJ 400-mil Plastic SOJ
10
10
12
12
15
15
ISSI
(R)
Integrated Silicon Solution, Inc.
2231 Lawson Lane Santa Clara, CA 95054 Tel: 1-800-379-4774 Fax: (408) 588-0806 E-mail: sales@issi.com www.issi.com
8
Integrated Silicon Solution, Inc. -- 1-800-379-4774
Rev. H 10/02/00

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